Multiprocessor Clustering for Embedded System Implementation

Abstract

In this paper, we address two key trends in the synthesis of implementations for embedded multiprocessors - (1) the increasing importance of managing interprocessor communication (IPC) in an efficient manner, and (2) the acceptance of significantly longer compilation time by embedded system designers. The former aspect is especially evident in the increasing interest among embedded system architects in innovative communication architectures, such as those involving optical interconnection technologies, and hybrid electro-optical structures. The latter aspect - increased compile-time tolerance - results because embedded multiprocessor systems are typically designed as final implementations for dedicated functions. While multiprocessor mapping strategies for general-purpose systems are usually designed with low to moderate complexity as a constraint, embedded system design tools are allowed to employ more thorough and time-consuming optimization techniques.

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 2001
Accession Number
ADA476332

Entities

People

  • Shuvra S. Bhattacharyya
  • Vida Kianzad

Organizations

  • University of Maryland

Tags

Communities of Interest

  • C4I
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Clustering
  • Computational Complexity
  • Computer Science
  • Computers
  • Digital Signal Processing
  • Embedded Systems
  • Genetic Algorithms
  • Multiprocessors
  • Optical Interconnects
  • Optimization
  • Parallel Computing
  • Parallel Processing
  • Parallel Processors
  • Probability
  • Processing Equipment
  • Signal Processing

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.
  • Systems Analysis and Design