Custom Hardware to Eliminate Bottlenecks in QKD Throughput Performance

Abstract

The National Institute of Standards and Technology (NIST) high-speed quantum key distribution (QKD) system was designed to include custom hardware to support the generation and management of gigabit data streams. As our photonics improved our software sifting algorithm couldn't keep up with the amount of data generated. To eliminate this problem we implemented the sifting algorithm into our programmable chip (FPGA) hardware, gaining a factor of 50x improvement in the sifting capacity rate. As we increased the distance and speed of our QKD systems, we discovered a number of other performance bottlenecks in our custom hardware. We discuss those bottlenecks along with a new custom hardware design that will alleviate them, resulting in an order of magnitude increase in capacity of secret key generation rate.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 2007
Accession Number
ADA506849

Entities

People

  • Alan Mink

Organizations

  • National Institute of Standards and Technology

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Abstracts
  • Algorithms
  • Amplification
  • Circuit Boards
  • Circuits
  • Computers
  • Demographic Cohorts
  • Detectors
  • Field Programmable Gate Arrays
  • Local Area Networks
  • Optics
  • Parallel Computing
  • Parallel Processing
  • Printed Circuit Boards
  • Printed Circuits
  • Quantum Key Distribution
  • Standards

Fields of Study

  • Computer science

Readers

  • Educational Psychology
  • Parallel and Distributed Computing.
  • Quantum Dot Semiconductor Device Photonics and Graphene Optoelectronic Materials and THz Physics.

Technology Areas

  • Quantum Computing
  • Quantum Science - Quantum Key Distribution