Power MEMS Development

Abstract

SHORT LOOP EXPERIMENTS: During this period we completed one short loop experiment to verify the use of chromium (Cr) as a hard mask for silicon dioxide (SiO2) wet etching. This Cr hard mask was used during the fabrication of the Indent layer in the process flow. For this experiment, we deposited 3-micrometers of SiO2 on the wafer and then sputtered a layer of Cr. We patterned and etched the Cr, creating the hard mask, and then etched the SiO2 using a 6:1 buffered oxide etchant. The Cr made an excellent hard mask in our process. Figure 1 is a scanning electron microscope (SEM) image of the 3-micrometers undercut of the SiO2 using the Cr hard mask, this undercut is expected with an isotropic wet etch. FABRICATION: With the short loop experiments, described above and in last period, completed, we began full loop wafer processing using the previously developed process flow which incorporates two wafers, one silicon double-sided polished (DSP) and one silicon-on-insulator (SOI), which will be bonded together using our EVG wafer-to-wafer bonding tool to complete the devices.

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 2009
Accession Number
ADA510292

Entities

People

  • John Bumgarner

Organizations

  • SRI International

Tags

DTIC Thesaurus Topics

  • Ceramic Materials
  • Circuit Breakers
  • Electron Microscopes
  • Electrons
  • Elements
  • Etching
  • Fabrication
  • Materials
  • Measurement
  • Metals
  • Scanning Electron Microscopes
  • Signal Generators
  • Silicon Dioxide
  • Stresses
  • Terminals
  • Thermal Conductivity
  • Three Dimensional

Readers

  • Integrated Circuit Design and Technology.
  • Nanofabrication and Microfabrication.
  • Semiconductor Device Technology

Technology Areas

  • Microelectronics
  • Microelectronics - Graphene
  • Microelectronics - Microelectromechanical Systems