A Field Programmable Gate Array Based Software Defined Radio Design for the Space Environment

Abstract

This thesis focuses on a Software Defined Radio (SDR) designed to compress a wideband radio signal input for a narrowband signal output. The design is based on a Field Programmable Gate Array (FPGA), which is chosen for its reprogrammability, flexibility, and our ability to introduce fault tolerance into the design. Software design tools allowed programming to be done at a high level, thereby allowing more progress on the design. This thesis focuses on one such SDR that was designed at a high level of abstraction. This thesis documents an analysis of the memory and timing requirements of the circuit so that it may be used on resource-constrained FPGA devices. It also explores the operating capabilities and limitations for this circuit under various resourceconstrained conditions and introduces algorithms for fault detection to make the circuit more compatible with the space environment.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 2009
Accession Number
ADA514352

Entities

People

  • Jeremy V. Livingston

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Advanced Electronics
  • Space

DTIC Thesaurus Topics

  • Algorithms
  • Artificial Satellites
  • California
  • Circuit Analysis
  • Circuits
  • Data Compression
  • Detection
  • Diagrams
  • Digital Signal Processing
  • Electrical Engineering
  • Fault Tolerance
  • Field Programmable Gate Arrays
  • Graphical User Interface
  • Signal Processing
  • Software Defined Radio
  • Space Environments
  • Systems Engineering

Fields of Study

  • Engineering

Readers

  • Distributed Systems and Data Platform Development
  • Integrated Circuit Design and Technology.
  • Radio communications and signal processing.

Technology Areas

  • Space