The Bulk Multicore Architecture for Improved Programmability

Abstract

In this article, we describe a novel, general-purpose multicore architecture-the Bulk Multicore-we designed to enable a highly programmable environment. In it, the programmer and runtime system are relieved of having to manage the sharing of data thanks to novel support for scalable hardware cache coherence. Moreover, to help minimize the chance of parallel-programming errors, the Bulk Multicore provides to the software high-performance sequential memory consistency and also introduces several novel hardware primitives. These primitives can be used to build a sophisticated program-development-and-debugging environment, including low-overhead data-race detection, deterministic replay of parallel programs, and high-speed disambiguation of sets of addresses.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 2009
Accession Number
ADA516614

Entities

People

  • Calin Cascaval
  • James Tuck
  • Josep Torrellas
  • Luis Ceze
  • Milos Prvulović
  • Pablo Montesinos
  • Wonsun Ahn

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Compilers
  • Computer Architecture
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Debugging
  • Decoding
  • Detection
  • Engineering
  • Instruction Set Architecture
  • Language
  • New York
  • Parallel Computing
  • Parallel Processing
  • Programming Languages
  • Universities

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.