A Design Methodology for Optoelectronic VLSI
Abstract
A methodology for designing silicon complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs) for implementation with optoelectronic (OE) technology is presented. Optoelectronic technology involves the bonding of laser detectors and transmitters to ports on the surface of the silicon IC. The ports that connect to the laser devices are metal pads that are placed in a gridded area array. The methodology focuses only on the design of the digital logic circuitry of an FSOI system and consists of partitioning the design at the system level for a multiple IC implementation, using the Very high-speed integrated circuit Hardware Description Language (VHDL) as a means of design entry and definition, using computer-aided design (CAD) tools for logic synthesis and automatic placement and routing of transistors, and enhancing the CAD tools to perform automated placement and routing of the area array pads. The results of applying this approach to a number of ICs are discussed also.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2007
- Accession Number
- ADA517219
Entities
People
- Richard G. Rozier Iii
Organizations
- University of North Carolina at Charlotte