Is Power the New Brick Wall?

Abstract

Classical CMOs has still life left. Fully depleted devices will offer additional knobs for gate length scaling. Careful analysis of power delivery and I/Os show opportunities to reduce power losses in the system. Low voltage operation is biggest knob for power reduction, however need massive parallelism to get performance back and watch out for a low voltage cache situation. Sleep sub-threshold devices have their place in the low power applications, Need to push devices to obtain at lest 10% on current as conventional device. Adiabatic computing: the concepts are there, not clear where application space is. This needs further research.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2009
Accession Number
ADA529210

Entities

People

  • Wilfried Haensch

Organizations

  • IBM Thomas J. Watson Research Center

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Cell Size
  • Circuits
  • Corporations
  • Energy
  • Energy Consumption
  • Engineering
  • Frequency
  • High Density
  • High Voltage
  • Information Operations
  • Load Distribution
  • Low Voltage
  • Power Levels
  • Power Supplies
  • Printed Circuits
  • Three Dimensional
  • Voltage

Fields of Study

  • Physics

Readers

  • Brain and Cognitive Science; Experimental Psychology; Cognitive Neuroscience
  • Integrated Circuit Design and Technology.
  • Strategic Security Studies

Technology Areas

  • Space
  • Space - Hall-Effect Thruster