40 GSps, 6-bit RF DAC Design Report

Abstract

This report details the design of a 40 GSps, 6-bit radio frequency (RF) digital-to-analog converter (DAC). The technology used is IBM 45 nm complementary metal oxide (CMOS) silicon-on-insulator (SOI). The architecture of the DAC is a novel approach of interleaving multiple subDACs in such a way that the nyquist images cancel each other out, allowing beyond Nyquist use of the subDACs. This technique is leveraged to build the 40 GSps speed using 10 GSps subDACs, allowing instantaneous bandwidth of 20 GHz.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2011
Accession Number
ADA539001

Entities

People

  • James E. Wilson

Organizations

  • United States Army Research Laboratory

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Sensors

DTIC Thesaurus Topics

  • Bandwidth
  • Communication Systems
  • Complementary Metal-Oxide Semiconductors
  • Converters
  • Data Rate
  • Digital Signal Processing
  • Electronic Equipment
  • Field Programmable Gate Arrays
  • Frequency
  • Metal Oxides
  • Modules (Electronics)
  • Power Supplies
  • Radar
  • Radio Frequency
  • Signal Processing
  • Software Defined Radio
  • Test Equipment

Readers

  • Image Processing and Computer Vision.
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics