A Quaternary Decision Diagram Machine: Optimization of Its Code

Abstract

This paper first reviews the trends of VLSI design, focusing on the power dissipation and programmability. Then, we show the advantage of Quarternary Decision Diagrams (QDDs) in representing and evaluating logic functions. That is, we show how QDDs are used to implement QDD machines, which yield high-speed implementations. We compare QDD machines with binary decision diagram (BDD) machines, and show a speed improvement of 1.28-2.02 times when QDDs are chosen. We consider 1-and 2-address BDD machines, and 3- and 4-address QDD machines, and we show a method to minimize the number of instructions.

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Document Details

Document Type
Technical Report
Publication Date
Aug 01, 2010
Accession Number
ADA548376

Entities

People

  • Hiroki Nakahara
  • Jon T. Butler
  • Munehiro Matsuura
  • Tsutomu Sasao
  • Yoshifumi Kawamura

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Human Systems

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Circuits
  • Computers
  • Dissipation
  • Electronics
  • Engineering
  • Heuristic Methods
  • High Temperature
  • Integrated Circuits
  • Microprocessors
  • Optimization
  • Parallel Computing
  • Parallel Processing
  • Personal Computers
  • Test And Evaluation
  • Word Processors

Readers

  • Computer Programming and Software Development.
  • Integrated Circuit Design and Technology.