RSA Power Analysis Obfuscation: A Dynamic FPGA Architecture

Abstract

The modular exponentiation operation used in popular public key encryption schemes, such as RSA, has been the focus of many side channel analysis (SCA) attacks in recent years. Current SCA attack countermeasures are largely static. Given sufficient signal-to-noise ratio and a number of power traces, static countermeasures can be defeated, as they merely attempt to hide the power consumption of the system under attack. This research develops a dynamic countermeasure which constantly varies the timing and power consumption of each operation, making correlation between traces more diffcult than for static countermeasures. By randomizing the radix of encoding for Booth multiplication and randomizing the window size in exponentiation, this research produces a SCA countermeasure capable of increasing RSA SCA attack protection.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2012
Accession Number
ADA556730

Entities

People

  • John W. Barron

Organizations

  • Air Force Institute of Technology

Tags

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Asymetric Encryption
  • Background Noise
  • Coding
  • Cryptography
  • Department Of Defense
  • Electromagnetic Radiation
  • Energy Consumption
  • Experimental Design
  • Governments
  • Information Operations
  • Load Monitoring
  • Materials
  • Simulations
  • United States
  • United States Government

Fields of Study

  • Computer science
  • Mathematics

Readers

  • Cybersecurity.
  • Graph Algorithms and Convex Optimization.
  • Radio communications and signal processing.