Fighting Fire with Fire: Modeling the Datacenter-Scale Effects of Targeted Superlattice Thermal Management
Abstract
Local thermal hot-spots in microprocessors lead to worstcase provisioning of global cooling resources, especially in large-scale systems. However, efficiency of cooling solutions degrade non-linearly with supply temperature, resulting in high power consumption and cost in cooling - 50~100% of IT power. Recent advances in active cooling techniques have shown on-chip thermoelectric coolers (TECs) to be very efficient at selectively eliminating small hot-spots, where applying current to a superlattice film deposited between silicon and the heat spreader results in a Peltier effect that spreads the heat and lowers the temperature of the hot-spot significantly to improve chip reliability. In this paper, we propose that hot-spot mitigation using thermoelectric coolers can be used as a power management mechanism to allow global coolers to be provisioned for a better worst case temperature leading to substantial savings in cooling power. In order to quantify the potential power savings from using TECs in data center servers, we present a detailed power model that integrates on-chip dynamic and leakage power sources heat diffusion through the entire chip, TEC and global cooler efficiencies, and all their mutual interactions. Our multiscale analysis shows that, for a typical data center, TECs allow global coolers to operate at higher temperatures without degrading chip lifetime, and thus save 27% cooling power on average while providing the same processor reliability as a data center running at 288K.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2011
- Accession Number
- ADA557846
Entities
People
- Frederic T. Chong
- Luke Theogarajan
- Mohit Tiwari
- Susmit Biswas
- Timothy Sherwood
Organizations
- Lawrence Livermore National Laboratory