A Secure and Reliable High-Performance Field Programmable Gate Array for Information Processing

Abstract

Cognitive systems have requirements that are not met by existing commercially available architectures such as multi-core microprocessors or reconfigurable logic. In collaboration with Air Force Research Laboratory (AFRL), this project had the goal of creating a Field Programmable Gate Array architecture that is both high-performance and provides mechanisms to enforce secure operation. A new reconfigurable fabric was created with a number of unique features that enables secure bit-stream operation based on a hardware root of trust. A chip was created in collaboration with AFRL that included an AFRL design and the new asynchronous fabric, and the chip was submitted for fabrication through the Trusted Foundry Access Program.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2012
Accession Number
ADA559184

Entities

People

  • Rajit Manohar

Organizations

  • Cornell University

Tags

Communities of Interest

  • Advanced Electronics
  • Cyber
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
  • Air Force Research Laboratories
  • C Programming Language
  • Circuits
  • Computer Programming
  • Computers
  • Computing System Architectures
  • Fabrication
  • Field Programmable Gate Arrays
  • High Level Languages
  • Information Processing
  • Integrated Circuits
  • Intellectual Property
  • Language
  • Microprocessors
  • Military Research
  • Networks

Readers

  • Cybersecurity.
  • Integrated Circuit Design and Technology.