Representation and Scheduling of Scalable Dataflow Graph Topologies
Abstract
In dataflow-based application models, the underlying graph representations often consist of smaller sub-structures that repeat multiple times. In order to en- able concise and scalable specification of digital signal processing (DSP) systems a graphical modeling construct called "topological pattern" has been introduced in recent work [23]. In this thesis, we present new design capabilities for specifying and work- ing with topological patterns in the dataflow interchange format (DIF) framework which is a software tool for model-based design and implementation of signal process- ing systems. We also present a plug-in to the DIF framework for deriving parameter- ized schedules, and a code generation module for generating code that implements these schedules. A novel schedule model called the scalable schedule tree (SST) is formulated. The SST model represents an important class of parameterized schedule structures in a form that is intuitive for representation, efficient for code generation and flexible to support powerful forms of adaptation. We demonstrate our meth- ods for topological pattern representation, SST derivation, and associated dataflow graph code generation using a case study centered around an image registration application.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2011
- Accession Number
- ADA559496
Entities
People
- Shenpei Wu
Organizations
- University of Maryland