Exploration of Nanometer Cognitive Reasoning Very Large Scale Integration (VLSI) Computer Architecures

Abstract

The objectives of this work were to design, develop, and evaluate support for the design of low-power hardware computer architectures at the Very Large Scale Integration (VLSI) level. The objectives were realized by achieving complete design flow integration with commercial and open-source Electronic Design Automation tools. The design flow takes as inputs a high-level system-level architecture description, along with area, critical path delay, and power dissipation constraints. Based on the System on Chip architecture description and design constraints, the tools automatically generate synthesizable Hardware Descriptive Language (HDL) models, embedded memories, and custom components to implement the specified VLSI architecture. Simulation results showed significant improvement over previous approaches with respect to power dissipation and leakage reduction.

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Document Details

Document Type
Technical Report
Publication Date
Apr 01, 2012
Accession Number
ADA560043

Entities

People

  • James E. Stine Jr.

Organizations

  • Oklahoma State University–Stillwater

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
  • Air Force Research Laboratories
  • Complementary Metal-Oxide Semiconductors
  • Computer Architecture
  • Computers
  • Dissipation
  • Energy Consumption
  • Engineering
  • Fabrication
  • Integrated Circuits
  • Intellectual Property
  • Large Scale Integration
  • Manufacturing
  • Semiconductor Manufacturing
  • Semiconductors
  • Simulations
  • Very Large Scale Integration

Fields of Study

  • Computer science
  • Engineering

Readers

  • Artificial Intelligence
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics