Device Technologies for Semiconductor Spintronic Circuits
Abstract
The goal of this project was to develop spin injection and detection techniques to enable spin transport to enhance the speed and design of CMOS VLSI circuits. Progress toward this goal over the duration of the award specifically impacts: (1) Understanding extrinsic origins of spin depolarization at interfaces and with localized impurity states; and (2) Quantifying the extent to which physical processes and boundary conditions affect spin dephasing in vertical-transport devices. The results of these efforts were the following. We analytically derived the impulse response (Green's function) of a current-sensing spin detector. We showed that spin diffusion and concomitant spin dephasing could be greatly enhanced with respect to charge diffusion. We showed that strong spin relaxation at oxide interfaces yielded a spin lifetime of ~1 ns, orders of magnitude lower than lifetimes in bulk Si. Experimental evidence of spin precession during travel through the doped Si channels indicated delays associated with electron capture or reemission in shallow impurity traps. These results helped to significantly improve the understanding of spin transport in silicon.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 20, 2012
- Accession Number
- ADA560241
Entities
People
- J. Kolodzey
Organizations
- University of Delaware