The Integrity of FPGA Designs: Capabilities Enabled by Unlocking Bitstreams and 3rd-Party IP
Abstract
We introduce a novel, broad definition of Field Programmable Gate Array design integrity. We claim that an FPGA design with integrity must continuously provide the FPGA user with the function described by the designer and no other function. Using this definition, we explore its value to the domains of FPGA Trust, high-reliability FPGA design, and FPGA design anti-obsolescence. Further, we describe solutions in each of those domains that have a common starting point: Luna's unique software that evaluates the previously inaccessible designs inside of FPGA bitstreams and 3rd-Party Intellectual Property.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2012
- Accession Number
- ADA561734
Entities
People
- Jonathan Graf
- Lee Lerner
- Scott Harper