Secure Heterogeneous Multicore Platform Through Diversity and Redundancy

Abstract

This project aimed to significantly enhance the security of future multi-core platforms against software exploits by exploiting abundant parallel computing resources. In this context, the project developed hardware-assisted run-time monitoring techniques to detect attacks exploiting memory safety errors or emerging parallel program errors. The project also found that security and reliability techniques could be combined, in particular in the context of off-chip memory protection, to provide both properties with the cost of one. In addition to developing efficient and effective run-time protection techniques against software exploits, this project also resulted in multiple contributions in the general area of building more secure hardware foundations, including a secure hardware design process, hybrid memory with an application to fast recovery, hardware device signatures, and true random number generation.

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Document Details

Document Type
Technical Report
Publication Date
Mar 31, 2012
Accession Number
ADA567533

Entities

People

  • G. E. Suh

Organizations

  • Cornell University

Tags

Communities of Interest

  • Energy and Power Technologies
  • Human Systems

DTIC Thesaurus Topics

  • Algorithms
  • Computational Complexity
  • Computer Programming
  • Computer Programs
  • Computers
  • Computing System Architectures
  • Consumers
  • Demographic Cohorts
  • Detection
  • Detectors
  • Energy Consumption
  • Errors
  • Hierarchies
  • Operating Systems
  • Platforms
  • Reliability
  • Security

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.
  • Software Engineering.
  • Systems Analysis and Design