Programmable Numerical Function Generators: Architectures and Synthesis Method

Abstract

This paper presents an architecture and a synthesis method for programmable numerical function generators of trigonometric functions, logarithm functions, square root, reciprocal, etc. Our architecture uses an LUT (Look-Up Table) cascade as the segment index encoder, compactly realizes various numerical functions, and is suitable for automatic synthesis. We have developed a synthesis system that converts MATLAB-like specification into HDL code. We propose and compare three architectures implemented as a FPGA (Field-Programmable Gate Array). Experimental results show the efficiency of our architecture and synthesis system.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Aug 01, 2005
Accession Number
ADA596286

Entities

People

  • Jon T. Butler
  • Shinobu Nagayama
  • Tsutomu Sasao

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Abstracts
  • Accuracy
  • Algorithms
  • Automatic
  • Coefficients
  • Computations
  • Computer Programming
  • Computers
  • Digital Signal Processing
  • Errors
  • Generators
  • Logic Elements
  • Precision
  • Signal Processing
  • Specifications
  • Square Roots
  • Standards

Fields of Study

  • Computer science

Readers

  • Calculus or Mathematical Analysis
  • Computer Programming and Software Development.
  • Parallel and Distributed Computing.