Numerical Function Generators Using LUT Cascades
Abstract
This paper proposes an architecture and a synthesis method for high-speed computation of fixed-point numerical functions such as trigonometric, logarithmic, sigmoidal, square root, and combinations of these functions. Our architecture is based on the lookup table (LUT) cascade, which results in a significant reduction in circuit complexity compared to traditional approaches. This is suitable for automatic synthesis and we show a synthesis method that converts a Matlab-like specification into an LUT cascade design. Experimental results show the efficiency of our approach as implemented on a field-programmable gate array (FPGA).
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 2007
- Accession Number
- ADA596287
Entities
People
- Jon T. Butler
- Shinobu Nagayama
- Tsutomu Sasao
Organizations
- Naval Postgraduate School