Structural Computer-Aided Design of Current-Mode CMOS Logic Circuits

Abstract

A set of CAD tools for the synthesis and layout generation of multiple-valued current-mode CMOS logic (CMCL) circuits is described. The synthesis method is based upon the cost-table method. The general circuit structure, the cost-table functions and the decomposition procedure used in the cost-table synthesis program are explained. The synthesis program is based upon a logically complete set of basic elements for CMCL circuits. After circuit synthesis the actual layout is generated using standard-cell IC design tools.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1988
Accession Number
ADA608071

Entities

People

  • Hans Kerkhoff
  • Jon Butler
  • Siep Onneweer

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Boolean Algebra
  • Charge Coupled Devices
  • Circuits
  • Complementary Metal-Oxide Semiconductors
  • Computer Programs
  • Computer-Aided Design
  • Computers
  • Decomposition
  • Demographic Cohorts
  • Digital Images
  • Electrical Circuits
  • Electronic Circuits
  • Integrated Circuits
  • Logic
  • Logic Gates
  • Multiplication Factor
  • Standards

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Integrated Circuit Design and Technology.