PUP: An Architecture to Exploit Parallel Unification in Prolog

Abstract

The architecture described in this paper achieves high performance execution of Prolog programs by exploiting fine grain parallelism. Fine grain parallelism includes unification parallelism as well as parallelism among the arithmetic and bookkeeping operations. Our implementation of the architecture has multiple functional units, each tailored to a specific task, that operate in parallel. Unification and arithmetic operations are allowed to execute out of order and are dynamically scheduled on several unification units. Simulation results for the implementation are presented and analyzed.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1988
Accession Number
ADA611542

Entities

People

  • Ashok Singhal
  • Chien Chen
  • Yale N. Patt

Organizations

  • University of California, Berkeley

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Abstracts
  • Access Time
  • Algorithms
  • Arbitration
  • Arithmetic
  • Complex Systems
  • Computer Programming
  • Computer Science
  • Computers
  • Computing System Architectures
  • Determinants (Mathematics)
  • Environment
  • Instruction Set Architecture
  • Language
  • Scheduling (Production)
  • Simulations
  • Simulators

Fields of Study

  • Computer science
  • Engineering

Readers

  • Computational Linguistics
  • Distributed Systems and Data Platform Development
  • Systems Analysis and Design