Computer Architecture for Energy Efficient SFQ

Abstract

This report identifies a candidate architecture for an energy efficient SFQ-based processor unit. It quantitatively analyzes candidates for register and main memory with respect to access time, density and energy efficiency. Finally, it investigates the efficacy of three dimensional integration (3DI) for enhancing aerial circuit density.

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Document Details

Document Type
Technical Report
Publication Date
Aug 27, 2014
Accession Number
ADA614747

Entities

People

  • Gerald W. Gibson Jr.

Organizations

  • IBM Thomas J. Watson Research Center

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Abstracts
  • Access Time
  • Circuit Boards
  • Circuits
  • Computing System Architectures
  • Department Of Defense
  • Efficiency
  • Electronics
  • Energy Consumption
  • Energy Efficiency
  • Engineering
  • Impedance
  • Inductance
  • Josephson Junctions
  • Packing Density
  • Printed Circuits
  • Standards

Fields of Study

  • Physics

Readers

  • Energy Conservation and Renewable Energy Engineering.
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design