Modeling & Analysis of Multicore Architectures for Embedded SIGINT Applications
Abstract
The future battlespace is likely to be increasingly contested and, in many cases, completely denied to joint military forces. Traditional operational approaches, including methods for intelligence, surveillance, and reconnaissance (ISR), will be challenged by the shift from permissive to non-permissive domains. The utility of embedded processing architectures will be driven by energy efficiency as much as it will be by high performance. Fortunately, there has been tremendous growth in the development of high performance, low power multi- and many-core architectures. This project sought to develop a power and performance modeling approach to apply towards such emerging architectures. Through this modeling approach, the intent is to (1) accurately predict peak application performance, as opposed to relying only on theoretical analysis and (2) identify optimal processor requirements, so as to minimize power consumption and/or more efficiently task processing resources. The capability offered by this modeling technique is expected to allow system designers to make more informed selection of high performance embedded computing (HPEC) technologies.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2015
- Accession Number
- ADA619981
Entities
People
- Ryan Luley
Organizations
- Air Force Research Laboratory