Trustworthy System Development Through High-Level Synthesis

Abstract

Major processor manufacturers have embraced the high-level synthesis (HLS) design philosophy. HLS offers the potential to explore the design space of electronic circuits and systems more efficiently than traditional methods. In this thesis, we investigate the application of HLS to hardware-oriented security and trust by developing a model of a simple 16-bit Central Processing Unit in the SystemC modeling language. We enhanced our processor with a simple security mechanism that enforces a memory integrity policy. The integrity policy allows a region of the program labeled as trustworthy to modify any address in data memory, but another region of the program labeled as untrustworthy is restricted to only being able to modify a specific region of data memory. Our timing results show that adding the integrity policy enforcement mechanism has a negligible effect on overall system performance.

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Document Details

Document Type
Technical Report
Publication Date
Sep 01, 2014
Accession Number
ADA620479

Entities

People

  • Isaac Patterson

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Cyber

DTIC Thesaurus Topics

  • Central Processing Units
  • Circuits
  • Computer Programming
  • Computer Science
  • Computers
  • Department Of Defense
  • Electronic Circuits
  • Fabrication
  • Field Programmable Gate Arrays
  • Integrated Circuits
  • Intellectual Property
  • Language
  • Logic
  • Logic Gates
  • Manufacturing
  • Nand Gates
  • Xor Gates

Fields of Study

  • Computer science

Readers

  • Cybersecurity.
  • Joint Military Operations and Doctrine.
  • Parallel and Distributed Computing.

Technology Areas

  • Microelectronics
  • Space