Mapping Parameterized Dataflow Graphs onto FPGA Platforms (Preprint)

Abstract

This paper provides background on relevant methods for application modeling, and platform-based implementation of dynamically reconfigurable signal processing systems. New methods were developed based on an application modeling formalism called parameterized dataflow, along with techniques for mapping parameterized dataflow specifications onto Field Programmable Gate Array architectures. The proposed parameterized dataflow approach for design and implementation of dynamically reconfigurable signal processing systems provides a comprehensive framework that encompasses application modeling, task scheduling, and hardware mapping. These methods were demonstrated using case studies in the domains of wireless communication and computer vision.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 2014
Accession Number
ADA621412

Entities

People

  • Chung-ching Shen
  • Hojin Kee
  • Hsiang-huang Wu
  • Nimish Sane
  • Shuvra S. Bhattacharyya
  • William Plishker

Organizations

  • University of Maryland

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Air Force Research Laboratories
  • Application-Specific Integrated Circuits
  • Case Studies
  • Circuits
  • Computations
  • Computers
  • Engineering
  • Field Programmable Gate Arrays
  • Image Processing
  • Integrated Circuits
  • Networks
  • Platforms
  • Recognition
  • Scheduling (Production)
  • Signal Processing
  • Specifications
  • Standards

Fields of Study

  • Computer science
  • Engineering

Readers

  • Computational Modeling and Simulation
  • Computer Networking
  • Software Engineering.

Technology Areas

  • AI & ML
  • AI & ML - Machine Learning Algorithms