Scalable Low-Power Deep Machine Learning with Analog Computation

Abstract

Over the course of this project we have accomplished the primary objective of this seedling project to develop analog computational circuits for deep machine learning. We have performed extensive simulations investigating the magnitude of errors expected from analog computational elements and their impact on the overall learning performance. We have also fabricated and tested a prototype chip, which demonstrates successful execution of an unsupervised machine learning task. We have further designed a second more complex learning chip. We have made significant innovations to the algorithm to facilitate analog implementation. We have also implemented several adaptive circuits in a field-programmable analog array (FPAA).

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Jul 19, 2013
Accession Number
ADA623261

Entities

People

  • Itamar Arel
  • Jennifer Hasler
  • Jeremy Holleman

Organizations

  • University of Tennessee system

Tags

Communities of Interest

  • Advanced Electronics
  • Autonomy
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Amplifiers
  • Computations
  • Computer Programming
  • Data Sets
  • Electrical Engineering
  • Energy Efficiency
  • Engineering
  • High Voltage
  • Information Science
  • Machine Learning
  • Neural Networks
  • Pattern Recognition
  • Simulations
  • Standards
  • Students
  • Unsupervised Machine Learning

Fields of Study

  • Computer science

Readers

  • Distributed Systems and Data Platform Development
  • Integrated Circuit Design and Technology.

Technology Areas

  • AI & ML
  • AI & ML - Neural Networks