A Cooperative Terminal Information Transfer System
Abstract
This report proposes a digital synchronous internal information transfer system for relatively unsophisticated USAF aircraft. A detailed description of the design and its application to a specific example (a postulated A-10 avionics suite) are provided. An inexpensive clock reference coordinates bit timing at the terminals, permitting the elimination of a central bus controller and supervisory (overhead) words on the bus. The transmission rate is lower than that usually encountered, made possible by: (1) eliminating overhead words; (2) doing away with (inefficient) word packing on the line; and (3) achieving a high bus loading (utilization) factor by a bit-time slot allocation scheme unique for the application. The lower operating frequency should alleviate bus-to-terminal impedance matching and line coupling problems. The proposed use of replaceable (plug-in) memories for storage of the system operating parameters probably will permit a high degree of circuit standardization (interchangeability) within the terminals. It is concluded that the system should be simpler, more dependable and less expensive than alternate multiplex methods for the stated application. An in-house experimental program to verify the design is recommended.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1974
- Accession Number
- ADB002182
Entities
People
- Blinn W. Russell
Organizations
- Air Force Research Laboratory