Binary Adder with Fast Ripple Carry.

Abstract

The patent application describes a binary adder using a sequence of alternating pairs of stages. Each stage has a full adder including an exclusive NOR circuit and a fast ripple carry gate. The carry in signal is fed to a logic gating circuit which becomes a sum output or is inverted and then becomes a sum output. The necessity for inversion is dependent upon gating signals applied to a pair of CMOS transistors, which are derived by the exclusive NOR circuit that is connected to the addend and augend inputs.

Document Details

Document Type
Technical Report
Publication Date
Jan 19, 1976
Accession Number
ADD002342

Entities

People

  • Janius I. Pridgen

Organizations

  • United States Department of the Air Force

Tags

DTIC Thesaurus Topics

  • Active Electronic Components
  • Electronic Components
  • Electronic Equipment
  • Electronics
  • Intellectual Property
  • Inversion
  • Law
  • Patent Applications
  • Patents
  • Sequences
  • Transistors

Readers

  • Computer Programming and Software Development.
  • Government and Public Administration Law.
  • Integrated Circuit Design and Technology.