Vertical Field Effect Transistor with Barrier Gate.
Abstract
A high power frequency field effect transistor is achieved with a vertical structure of gallium arsenide including a semi-insulating substrate, a conductive layer over the substrate, a narrow-central post having small metal gate electrodes on each side, metal drain electrodes on the conductive layer spaced from the central pose and a metal source electrode supported on the central post. A deep channel around the post separates the metal drains, gates and source. Increased power is obtained from a cellular unit including two parallel source stripes, four gates and three drains. The drains are connected together by the conductive layer and a drain pad at one end, and the gates are connected at the other end by a gate pad on an outer region of the substrate. The gate connections to the pad are isolated from the conductive layer by a bridge over a space etched in the lower layer. A method for fabrication of this structure is also provided. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 21, 1981
- Accession Number
- ADD008829
Entities
People
- Ho-chung Huang
- Ralph H. Matarese
Organizations
- United States Army