Microprocessor Controlled Phase Locked Loops.
Abstract
A digital counter is phased locked to a reference frequency by a voltage control oscillator which causes the counter to increase its count rate or decrease its count rate in accordance to the presence of a one or a zero on the most significant bit of the counter at the halfway point of one cycle of the reference frequency. The counter is reset at the end of the cycle of the reference frequency. A single microprocessor which can assess this most significant bit (MSB) and vary the oscillator output, can in this manner control any number of independent phase lock loop circuits. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 09, 1981
- Accession Number
- ADD009129
Entities
People
- David O. Light Jr.
- Frank Hayes Iii
- Joseph R. Mcginty
Organizations
- United States Department of the Navy