Multiple Frequency Locked Loops.

Abstract

A signal processor circuit including a plurality of similar stages, each of which is capable of locking onto and tracking a different frequency of a multiple-frequency composite signal applied to the processor. Each of the stages may comprise a frequency locked loop plus a variable frequency stop, the tuning of which tracks the frequency locked loop. The variable stop circuit passes the non-locked components to the next similar stage which locks onto one of these components. (Author)

Document Details

Document Type
Technical Report
Publication Date
Feb 02, 1982
Accession Number
ADD009258

Entities

People

  • Otto E. Rittenbach

Organizations

  • United States Army

Tags

DTIC Thesaurus Topics

  • Frequency

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Radar Systems Engineering.
  • Radio communications and signal processing.