A Dual Channel Gated Peak Detector.
Abstract
A dual channel peak detector having an automatic gain control (AGC) circuit maintains an internal replica of a gated input signal waveform at a constant peak level. An rf signal is input to a double balanced mixer to select that portion of the signal within the time interval of interest. A delay and gate generator circuit provides a variable delay from a sync input and generates a variable length gate which gates on the double balance mixer to pass the signal of interest to the remainder of the peak detector circuit. The gated signal is amplified and multiplied by a pseudo-dc signal from the AGC circuit. The peak level of the resultant gated signal is detected. The detected peak level is sampled and input to the AGC circuit which computes the AGC circuit output voltage required to maintain a constant detected peak level amplitude. The AGC circuit output voltage is summed with the voltage from a second channel, and is also output as a dB value and a ratio between channels. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 30, 1982
- Accession Number
- ADD009852
Entities
People
- R. W. Reed
Organizations
- United States Department of the Navy