Pulse Modulator.

Abstract

A low level input pulse signal from T2L logic is delivered to the input of a ground deck driver which is transformer-coupled to a floating deck driver. The leading edge of the input pulse serves to enable or trigger a first FET driver, which is coupled to the gates of a plurality of series-connected FETs via a first transmission line transformer. The triggering of the FET driver serves to turn-on the series-connected FETs so that the same delivers a high voltage signal to an output load. A second FET driver is coupled to the gates of another plurality of series-connected FETs, which serve as a tail-biter to terminate the power to the output load. And, a third FET driver is coupled to the gates of the first-mentioned series-connected FETs to turn the same to the OFF state. The second and third FET drivers are coupled to their respective series-connected FETs via respective transmission line transformers. The trailing edge of the input trigger pulse enables the second and third FET drivers to concurrently turn-on the tail-biter FETs and turn-off the first-mentioned, series-connected FETs.

Document Details

Document Type
Technical Report
Publication Date
Jun 13, 1986
Accession Number
ADD012536

Entities

People

  • Charles Kerfoot
  • Franklin B. Jones
  • Walter E. Milberger

Organizations

  • United States Army

Tags

DTIC Thesaurus Topics

  • High Voltage
  • Leading Edges
  • Modulators
  • Trailing Edges
  • Transformers
  • Transmission Lines

Readers

  • Electrical Engineering
  • Electronics Engineering