Ohmic Contact for Semiconductor

Abstract

An electronic semiconductor device comprising a semiconductor base deposited on a semiconductor substrate by means of molecular beam epitaxy and source, drain and gate disposed on the base in a spaced relationship to each other, the source and the drain comprising Pd/barrier/Au layers with the palladium layer being in contact with the device. The device is fabricated conventionally except the heat treating is at above about 170 deg C for 1/4-10 hours sufficient for the palladium layer to react with the base yielding reduced contact and access resistances and a narrower spacing between source and drain.

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Document Details

Document Type
Technical Report
Publication Date
Mar 27, 1997
Accession Number
ADD018669

Entities

People

  • John B. Boos

Organizations

  • United States Department of the Navy

Tags

DTIC Thesaurus Topics

  • Electron Microscopy
  • Energy Bands
  • Epitaxial Growth
  • Fabrication
  • Field Effect Transistors
  • Heat Energy
  • Heat Treatment
  • Lithography
  • Low Temperature
  • Material Degradation Processes
  • Materials
  • Metal-Semiconductor Junctions
  • Molecular Beam Epitaxy
  • Molecular Beams
  • Semiconductor Devices
  • Semiconductors
  • Substrates

Fields of Study

  • Materials science

Readers

  • Electrical Engineering
  • Semiconductor Device Technology

Technology Areas

  • Microelectronics
  • Space
  • Space - Hall-Effect Thruster