Synchronous Demultiplexer Circuit and Method
Abstract
A digital counting circuit with multiple outputs is used to clock interlaced 16-bit data words into separate digital-to-analog converters in the correct sequence for each of eight hydrophone channels. The circuit utilizes a programmable memory to detect a synchronizing bit pattern.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 26, 2010
- Accession Number
- ADD020470
Entities
People
- James D. Hagerty
Organizations
- United States Department of the Navy