Analysis of Low-Level Computer Vision Algorithms for Implementation on a VLSI Processor Array,

Abstract

In a recent paper Lowry 81, we described an architecture for a computer vision rectangular processor array that is suitable for VLSI implementation. In this paper we will review that architecture and discuss extensions to it and present results of an array simulator applied to vision algorithms. We will also present an algorithm for re-routing an array with bad processors into a working subset of the array, making it feasible to implement a large array on one wafer-sized chip. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1982
Accession Number
ADP000139

Entities

People

  • Allan Miller
  • Michael R. Lowry

Organizations

  • Stanford University

Tags

DTIC Thesaurus Topics

  • Algorithms
  • Computer Vision
  • Computers
  • Control Simulators
  • Simulations
  • Simulators
  • Workshops

Fields of Study

  • Computer science

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Instructional Design and Training Evaluation.
  • Integrated Circuit Design and Technology.

Technology Areas

  • AI & ML