Micropower CMOS Implementation of Three-Valued Logic Functions,
Abstract
A method for implementing ternary logic functions with CMOS integrated circuits is proposed. This method has the significant advantage of very low static power consumption at any of three logic levels comparable to that of binary CMOS circuits, and also it needs no modification in the fabricating process of the present CMOS technology. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- May 01, 1983
- Accession Number
- ADP002333
Entities
People
- S. Muta
Organizations
- Oita University