Towards the Functional Partitioning of Highly Integrated, Fault Tolerant Avionics Signal Processors,
Abstract
Avionics systems for new interdiction fighter aircraft require a high degree of integration, translated into automation for crew operations, of such formerly diverse subsystems of penetration, target acquisition, weapon delivery, threat detection and suppression and flight/propulsion control. Also coupled into this is the infusion of VHSIC/VSLIC. All this implies the need for a fault tolerant system to ensure flight safety and high operational ability. This paper discusses some of the partitioning (configuration) issues involved in the integration process. Specifically, this paper addresses itself to the issues involved with the functional partitioning into generic high speed signal processors and how this partitioning will cross some of the traditional interfaces between such things as flight control systems and avionics systems and subsystems within the avionic suite. Of special interest is the partitioning for sensor blending/data fusion/hi-speed data buses as pertains to terrain following/terrain avoidance function and how the critical path computations can be made fault tolerant and/or allow for graceful degradation so that flight/mission safety is assured. Also discussed are the methods for computing reliability values based on these new configurations so that fault tolerant evaluations methods, such as the Markow process, may more realistically be computed. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 01, 1983
- Accession Number
- ADP002848
Entities
People
- J. A. Rey