Aspects of Surface Mounted Chip Carrier Solder Joint Reliability,
Abstract
When successful commercial surface mounted technology (SMT) was applied to military environments with ceramic chip carriers, unsatisfactory solder joint life was experienced. The problem of how SMT could be successfully implemented for military requirements was addressed. The nature of the leadless solder joint fatigue strains and addresses was reviewed. A set of design requirements was established as a baseline for the analysis. Matching the coefficient of expansion of the board and chip carrier does not necessarily prevent fatigue failure as the analysis showed relatively high stresses and the presence of reciprocating strain. A statistical method was outlined for determining if a solder joint design would meet an established fatigue criteria from a set of fatigue failure test data. The relatively high stresses and the presence of reciprocating strain can be reduced by the use of compliant leads on the ceramic chip carriers. An analysis of the compliant J lead indicated it could be a viable solution. In an exploratory 2000 thermal cycle fatigue test (-55 C to +125 C) no solder joint failures were experienced with a 68 lead ceramic chip carrier with compliant J leads on a glass epoxy board. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 01, 1987
- Accession Number
- ADP005196
Entities
People
- Herbert B. Ellis
Organizations
- Aerojet Rocketdyne Holdings