A Study of the Charge Trap Transistor for Post Fab Modification of Wafers

Abstract

Examine the feasibility of charge trap transistor effect for post fab intellectual property modification of wafers.

Document Details

• Document Type: DoD Grant Award
• Publication Date: Oct 24, 2018
• Source ID: FA86501617648

Entities

People

• None Listed

Organizations

• Air Force Research Laboratory
• Defense Advanced Research Projects Agency
• University of California, Los Angeles