PCB-Level Trojan Insertion System
Abstract
The life-cycle of a printed circuit board (PCB) – from design to manufacturing to system integration – often involves many untrusted entities, including untrusted design and fabrication facilities. These untrusted entities are capable of introducing malicious alterations to a PCB design to facilitate a functional failure or leakage of secret information during field operation. While researchers have been investigating the threat of malicious modifications within the scale of individual microelectronic components, the possibility of board-level malicious manipulation has primarily been unexplored. In the absence of standard benchmarking solutions, prospective countermeasures for PCB assurance are likely to utilize a homegrown representation of the attacks that undermines their evaluation and does not provide scope for comparison with other techniques. There is a critical need to develop a platform for PCB Trojan benchmarking to effectively evaluate emerging solutions for PCB assurance in an untrusted supply chain, which can provide a large representative dataset on the possible attack space. Such a framework is expected to enable an unbiased and comparable evaluation of various countermeasures. To address this critical need, this project aims at developing an eco-system for PCB Trojan benchmarking. In the context of this proposal, a benchmark refers to a PCB design (e.g., a netlist) with embedded Trojan circuit. The proposed eco-system consists of three main components: (1) a Trojan Taxonomy; (2) a CAD tool to insert Trojans into an arbitrary PCB netlist; and (3) a physical Trojan testing system, which emulates the insertion of Trojans into a PCB to facilitate testing Trojan detection techniques on dozens or hundreds of Trojans.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Dec 18, 2020
- Source ID
- FA87502111001
Entities
People
- Swarup Bhunia
Organizations
- Defense Advanced Research Projects Agency
- Rome Laboratory
- University of Florida