Basic Single-Event and Total-Ionizing Dose Mechanisms in Antimony (Sb)-Based CMOS Transistors with High-K Dielectric
Abstract
Technology scaling following Moore’s Law has led to an unprecedented level of integration, with billions of high-speed nanotransistors on a single chip reducing cost per function. New device architectures (e.g. multigate) and new materials (e.g. strained channel, high-?/metal gate stack) are being introduced at a rapid pace in a persistent effort towards enhancing the energy efficiency of the transistors. Due to their unique material properties, antimony (Sb) based compound semiconductor materials are of strong interest as channel material for sub 0.5 Volt supply voltage all-antimonide CMOS digital logic. Further, antimonide-based field effect transistors (FETs) can operate at ultra-high speed and very low drain voltages (as low as 0.1V), with greater than one order of magnitude reduction of power consumption in low noise amplifier millimeter wave integrated circuits (MMICs) when benchmarked against incumbent indium phosphide based FETs operating from X-band through W-band. Due to advancements in the atomic layer deposition (ALD) of high-? dielectric films on Sb-based materials, research teams from the University of Notre Dame and Stanford University, in collaboration with scientists from the United States Naval Research Lab (NRL), have recently demonstrated the world’s first Sb-based n-channel and p-channel metal-oxide-semiconductor quantum-well FETs, respectively. These new MOSFETs permit the develop¬ment of an antimonide-based complementary metal-oxide-semiconductor (CMOS) technology that promises to dramatically lower the power dissipation in future high-speed logic circuits. We expect that ultra high speed, ultra low-power antimonide-based FETs with a high-? dielectric gate will play a key role in future generation of terrestrial, space and electronic warfare (EW) systems. While the device technology development is moving forward at a rapid pace, little is understood about the performance of these technologies in hostile environments. The ongoing basic research program, HDTRA1-16-1-0021, is a joint collaborative research program between University of Notre Dame, Stanford University and the Naval Research Laboratory, with the following goals: i) expand the experimental and theoretical knowledge base of the basic mechanisms of single event and total ionizing dose effects in scaled heterostructure antimonide (Sb) transistors with integrated high-k dielectrics when exposed to radiation; ii) establish a robust, experimentally validated theoretical foundation that quantitatively captures the non-equilibrium transport of ionization-induced carriers in advanced heterostructure Sb MOSFETs; iii) utilize the calibrated theoretical model to extend it to the circuit level assessment of Sb MOSFET device technology for a range of ultra- low power digital and analog applications. At the end of the proposed period of research, the anticipated outcome of this program will be: (i) to establish the experimental and theoretical knowledge base of the primary events associated with response of high-? gated Sb MOSFETs to radiation, (ii) to establish a solid, experimentally-validated theoretical foundation that quantitatively captures the non-equilibrium transport of ionization-induced carriers in advanced heterostructure Sb MOSFETs, (iii) to extend the calibrated theoretical model to circuit level assessment of Sb MOSFET device technology for a range of ultra-low power digital and analog applications.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- May 26, 2016
- Source ID
- HDTRA11610021
Entities
People
- Suman Datta
Organizations
- Defense Threat Reduction Agency
- University of Notre Dame