Development of a 600MHz, 0.3MW Power Combining System Using RF LDMOS Power Transistors
Abstract
High Power Microwave Engineering Laboratory of the Kwangwoon University proposes the development of an all solid-state, compact power combining system with peak output power of 0.3MW operating at 600MHz.The proposed LDMOS-based power combining system consists of 5 major parts: (1) a 300W solid state power oscillator (SSPO), (2) 4-way and 40-way power dividers, (3) a 2kW solidstate-power-amplifier (SSPA) module, (4) a 40-way cavity combiner, and (5) a 4-waywaveguide combiner. High Power Microwave Engineering Laboratory of the Kwangwoon University proposes the development of an all solid-state, compact power combining system with peak output power of 0.3MW operating at 600MHz. The proposed LDMOS-based power combining system consists of 5 major parts: (1) a 300W solid state power oscillator (SSPO), (2) 4-way and 40-way power dividers, (3) a 2kW solidstate- power-amplifier (SSPA) module, (4) a 40-way cavity combiner, and (5) a 4-way waveguide combiner. A 500MHz signal source is generated by the 300W SSPO. The SSPO output signal of 300W splits into 4 channels and 40 channels in cascade by the use of 4-way and 40-way low-loss power dividers, resulting in 1W at the end of each power divider. The 1W input drive signal is injected into a 2-stage SSPA module, producing an amplified output power of 2kW with a power gain of 33dB. The amplified 2kW RF signals are combined in a high power cavity combiner with 40 input ports, producing a 75 kW output power. Since there are 4 cavity combiners, a 0.3MW high power RF source is produced by the use of a waveguide power combiner. All the RF channels should be tuned in phase and amplitude in order to minimize power combining loss. An extensive numerical analysis by the use of EM and circuit simulators is performed for maximizing the system performance of power combining efficiency (>95%), DC-RF conversion efficiency (>70%), gain (>33dB), combined output power (>0.3MW), and amplifier stability. A thermal loading effect on the transistor operated in a pulse mode with variable duty cycle is modeled in the ADS simulation. Average power limitation on both active devices (transistors) and RF passive components (combiner, divider, RF coupling devices) is investigated experimentally. The unique characteristics of an innovative power combiner is its compactness and extremely low power loss, making it possible to obtain an unmatchable power combining efficiency of more than 95%. With the highly efficient SSPA and power combiners, the system overall efficiency increases to more than 60%. The proposed power combining system operating in a high duty cycle will provide the key breakthroughs needed to advance MW-level, all solid state HPM technology. Budget Type: Enter name
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Nov 23, 2016
- Source ID
- N000141612990
Entities
People
- Jin Joo Choi
Organizations
- Kwangwoon University
- Office of Naval Research
- United States Navy