Design, Fabrication, and Testing of an 8-Bit Single-Flux-Quantum Array Multiplier in the MIT LL SFQ5ee Process
Abstract
AbstractThe objective of this project is to demonstrate correct operation of an 8-bit array multiplier implemented using a rapid single flux quantum (SFQ) logic fabric with our SFQ cell library and manufactured using the MIT LL 100 ??A/??m2 SFQ5ee process. The design will be optimized by investigating the use of multi-input cells, determining the degree of routing transparency within the designed cells, and using 1-to-3 splitter cells. Fabrication and testing will be done in twophases: (i) For basic 2-input logic and newly-designed multi-input cells, and (ii) For a 4-bit and an 8-bit multiplier. The testing of the fabricated chips will be addressed with help from the Office of Naval Research.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Jul 27, 2018
- Source ID
- N000141812637
Entities
People
- Massoud Pedram
Organizations
- Office of Naval Research
- United States Navy
- University of Southern California