On-axis Dislocation-free N-polar GaN on Si and SiC for Electronic Device
Abstract
ABSTRACT:N-polar GaN-based HEMTs can exhibit superior performance for mm-wave power amplifiers, compared to their conventional Ga-polar counterparts. To date, however, there have been very few reports on the epitaxy of N-polarity GaN on Si or SiC. Utilizing MOCVD as the growth technique for N-polar GaN would require the use of off-axis Si substrates, and the material quality depends critically on the offcut angle, which severely limits the device performance, yield, andmanufacturability. N-polar GaN with significantly reduced threading dislocation densities on on-axis Si wafers is desirable for electronic devices to reduce gate leakage current, improve electron mobility, and increase the device reliability. In this project, we aim to address these critical challenges by combining conventional planar epitaxy with GaN nanowire epitaxy and, through controlled coalescence of N-polar GaN nanowire arrays, we aim to demonstrate is location-free (dislocation densities <105 cm-2) N-polar GaN on Si(001) and SiC substrates. Unique to our approach is that high quality N-polar GaN will be produced directly from on-axis Si substrate, instead of the commonly used offcut substrate required for MOCVD. We will perform a detailed investigation of the structural, electronic, and charge carrier transport properties of N-polar GaNepilayers. During the course of this project, we will fabricate and characterize N-polar GaN-based HEMTs with AlGaN back-barrier on both Si(001) and SiC wafers, which will provide critical feedback for achieving superior quality N-polar GaN epilayers.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Apr 24, 2019
- Source ID
- N000141912225
Entities
People
- Zetian Mi
Organizations
- Board of Regents of the University of Michigan
- Office of Naval Research
- United States Navy