On-Chip Intelligent Sensor based Real-Time Analog Trojan Detection Framework for Microprocessor Trustworthiness
Abstract
Hardware level malicious modifications to integrated systems, commonly referred to as hardware Trojans, have been the subject of intense study in recent years. Such modifications, which are purportedly done without the knowledge of the designer or end-user of an integrated system, often in an overseas untrusted foundry or through malicious third-party resources, may provide additionalfunctionality that can be exploited by a perpetrator to cause erroneous results, steal sensitive information, or incapacitate a chip. Evidently, given the range of military applications where integrated systems are deployed, the impact of such hardware Trojans can be catastrophic.Upon this request, this project seeks to investigate the structure and the behavior of hardware Trojans enhanced by analog design techniques, hereafter referred to as analog Trojans, and to develop comprehensive solutions protecting integrated systems from Trojan attacks in microprocessors andmicroprocessor-based system-on-chips (SoCs). Analog Trojans supplemented by advanced design techniques allow the astute designer to implement extremely low impact and stealthy Trojans without sacrificing complexity or functionality. It therefore becomes extremely difficult to filter out analog Trojan infected hardware during the design integration stage, or at the post-silicon testing stage. Therefore, the objective of this project is to develop a real-time trustworthiness evaluation framework in large-scale microprocessors and SoCs relying on on-chip side-channel sensors which perform the task of on-chip measurement acquisition and classification so that the trust evaluation process of the target system is expanded from the testing stage to its whole life-cycle.Using both open-source and commercial microprocessor and SoC designs as our experimental platforms for the purpose of this project, along with the proposed intelligence system and sample analog hardware Trojans, we will aim to 1) Delineate the threat and potential impact of analog hardware Trojans in microprocessor and SoC integrated systems; 2) Depict the shortcomings of existing hardware Trojan detection methods in preventing/exposing the analog hardware Trojans;3) Design and implement an on-chip analog Trojan detection system for both microprocessor and SoC integrated systems; and 4) Demonstrate the effectiveness and efficiency of the proposed realtimetrust evaluation framework in ensuring the trustworthiness of integrated systems throughout the design life-cycle.This project will facilitate understanding the true threat posed by hardware Trojans developed using advanced design techniques and thereby the inadequacy of current detection methods, thus enabling the development of life-long protection schemes that will enable the secure deployment of a broad range of trusted integrated systems. This research will complement both government and military trends towards satisfying hardware security at all stages of the design flow, and generate practical methods whose utility can be extended to system designers, IP vendors, and end-users in fulfilling and ensuring dependability. Considering that almost all DoD systems rely on integrated computing systems, the research outcomes of this project will have ultimate importance in ensuring the trustworthiness of the hardware platforms within these systems.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Jun 13, 2019
- Source ID
- N000141912405
Entities
People
- Yier Jin
Organizations
- Office of Naval Research
- United States Navy
- University of Florida