Modeling, Design, and Optimization of High-speed Low-Power Time-Domain CryoLink for Superconducting Electronics Readout
Abstract
The design of next-generation quantum computers and high-resolution cryodetectors for scientific and defense applications necessitates high-quality microwave circuits. However, high data rates coupled with the need for reduced power consumption have presented several challenges in high-speed links for cryoelectronics. Though pipelining multiple parallel lanes can be explored, limited space and power budgets inside cryocooler prevent integration of multi-bit quantum computers of future. The proposed research aims to investigate the fundamental trade-off between noise performance, bandwidth, and power consumption for high-speed digital cryolinks. We will model, design, and implement multi-GBps data links interfacing superconducting circuits with external room temperature circuits while minimizing the number of intermediate gain stages. Time-domain equalizers with large delay-bandwidth products will be developed to achieve a wideband response with low bit-error-rates while consuming low power. A background optimizer and a DC offset correctioncircuit will perform multi-stage optimization of gain and bandwidth across different temperature stages. Link testing will be done from 4K to room temperature for characterizing the entire link. The research will benefit several emerging applications for quantum computing with high-quality microwave links as well as impact more DoD-specific areas, including radar, imaging, sensing, localization, and naval/airborne mobile communication networks.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Aug 05, 2021
- Source ID
- N000142112645
Entities
People
- Subhanshu Gupta
Organizations
- Office of Naval Research
- United States Navy
- Washington State University