PROMPT: Process for Rapid Optimization and Modeling of Power Transistors.
Abstract
Approved for Public Release:PROMPT: Procedure for Rapid Optimization and Modeling of Power Transistors. PROMPT is focused on explor ing, for the first time, an empirically validated reliability-based modeling and optimization platform, through device and computati on co-design, for future generation wide bandgap semiconductors. This effort will develop a computational framework combining finite element TCAD modeling and circuit simulations to rapidly prototype future wide bandgap semiconductor designs and evaluate their tra nsient performance in circuit applications. Empirically tested gallium nitride-based (GaN) diodes ranging from 1 kV to 20 kV will se rve as the basis on which the framework will be experimentally validated. Naval Research Lab (NRL) will provide data to PI Khanna to develop the models (see attached letter of support). Several devices within the range of 1 kV and 20 kV will be designed, allowing for new scaled projections of validated models to predict future higher voltage device performance. That is, this work will lead to the development of scaling rules, which can be used to project the performance of future high voltage devices currently not availabl e. Furthermore, the proposed optimization platform will enable devices to be designed and fabricated to maintain robust performance at the large-scale systems level so that the full performance entitlement of future wide bandgap semiconductor devices can be realiz ed. An empirically validated optimization framework will be implemented through device and computation co-design so that semiconduct ors are fabricated to maintain robust performance at the system (PEPDS) level. The proposed work will lay the foundation for electro thermal TCAD modeling, though data-sharing with Professor Samuel Graham, Georgia Tech (see attached letter of support), who will pro vide temperature characterization data of the GaN devices. The proposed multi-level integrated framework will allow a better assessm ent of device operating characteristics (thermal, switching efficiency) at the large scale-systems level. As a result of this work, system-level simulations, such as S3D, will be able to predict device behavior with improved fidelity. The proposed work will fundam entally transform the field of power electronics in the following ways. An empirically validated optimization framework will be impl emented through device and computation co-design so that semiconductors are fabricated to maintain robust performance at the system (PEPDS) level. This performance entitlement realization framework will be developed for current technologies, utilizing GaN, and the n shown by example how the framework can be extended to SiC, and even more promising materials of the future, such as gallium oxide (Ga2O3) and diamond. The proposed emphasis on reliability-based model parameters within the optimization framework will allow future generation wide bandgap semiconductors to achieve their full performance entitlement for the first time. Also, the proposed scaling rules will be necessary to accurately evaluate the potential of current and future devices. The scaled models will not only allow n ew applications of wide bandgap semiconductors, but also offer a roadmap towards future device development. That is, the models deve loped in the proposed work will inform the design and fabrication of next generation high voltage devices currently not available, i ncluding high-voltage versions of current technologies, as well as materials of the future.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Sep 07, 2021
- Source ID
- N000142112832
Entities
People
- Raghav Khanna
Organizations
- Office of Naval Research
- United States Navy
- University of Toledo