Predictive and Accelerated Modeling of Interfaces for Advanced Electronic Devices
Abstract
The Problem: With the advances in electronics the number of materials and their interfaces used in the electronic devices is increas,ing substantially. For example, if we look at a leading edge Si transistor today such as 10 nm FINFET, there are roughly 12 differen,t materials that are used in the transistor itself, without even considering the contacts. This number goes up even more if we go up, to metal 1 level. This leads to a number of challenges. On one hand, the large number of disparate materials leads to many differen,t ways of defect formation. Moreover, the thickness of different material layers is so small that the observed behavior is dominated, by surface energy and interfaces between different materials rather than their bulk properties. Take, for example, the gate stack o,f a modern MOSFET such as a nanosheet transistor. The Si channel is roughly 3 nm in thickness. It then interfaces with an 8 thick, SiO, and approximately 18 thick HfO2. It is clear that not only that the layers themselves are dominated by size effects due to, their very small thickness, but also the interfaces and their proximity to each other will dominate the overall behavior such as th,e capacitance of this structure and therefore achievable charge at a given voltage, and energy band diagram of Si that, in turn, det,ermines the velocities of the electrons and holes. Both these are critically important for the current voltage characteristic of the, device. How it is done today: Todays industry grade modeling tools mostly use material properties as given parameters calculated f,rom their bulk form. As a result, in most cases, these tools no longer have any predictive power. To compensate, usually the models, are calibrated by tuning different parameters using large set of experimental data. This beats one of the original purposes of mo,deling, which is to reduce the the cycle of un- guided, exploratory experimentation. In addition, as the number of materials and int,erfaces increase in future, the parameter space for exploration will multiply, thereby hindering the rate of progress substantially., In this context, Density Functional Theory (DFT) has been established as the pillar of computational material science. DFT is able, to model arbitrary interfaces and account for confinement effects by applying appropriate boundary conditions. However, DFT calcula,ine or amorphous materials, where a large number of different material phases have to be modeled and a statistical average needs to, be calculated, DFT calculations becomes almost impractical. For example, calculating material properties in the amorphous phase,olving roughly 100 atoms, takes almost a week 40 cores running in parallel. At least an order of magnitude increase in simulation sc,ale ( 1000 atoms) and an order of magnitude decrease in simulation time (hours rather than a week) is necessary. Our approach: We p,ropose to take advantage of the recent advances in artificial neural networks to substantially accelerate the calculation as well as, increase the simulation size to relevant scales. The key idea hinges on three points:- Using neural network to learn the behavior o,f DFT for a specific heterostructure- Understanding how lateral increase in size can be incorporated into a neural network- Once the, neural network is learnt, efficient generation of Monte Carlo samples will be performed. We will use the gate stack show in in Fig.,1 as our model system. The specific goal over 1 year will be to show feasibility of calculating a system containing 1000 atoms and a, time-to-solution in a few hours. Approved for Public Release
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Jan 14, 2022
- Source ID
- N000142212134
Entities
People
- Sayeef Salahuddin
Organizations
- Office of Naval Research
- United States Navy
- University of California Regents