Development of State-of-the-Art Trap Analysis Technique
Abstract
Publicly Releasable:The traditional trap analysis techniques use test structures that do not give complete insight on defects that e,xist in high-speed transistors. A new, state-of-the-art technique will be developed that will be able to extract more detailed trap,information directly from high-speed devices. The new trap analysis technique will be validated against standard techniques and appl,ied to analysis of the gate stack of MISHEMTs.
Document Details
- Document Type
- DoD Grant Award
- Publication Date
- Dec 06, 2022
- Source ID
- N000142312077
Entities
People
- Umesh Mishra
Organizations
- Office of Naval Research
- United States Navy
- University of California, Santa Barbara